Efstathios D. Kyriakis - Bitzaros

Current Position: Professor, Dpt of Electronics Eng. Piraeus Univ. of Applied Sciences

Education: B.Sc. Physics, Univ. of Patras

                  Ph.D., Electrical and Computer Engineering, Univ. of Patras

 

Dr. Kyriakis-Bitzaros received his B.Sc. degree in Physics from the University of Patras, Greece in 1987 and the Ph.D. degree in Electrical Engineering from the University of Patras, Greece in 1994. In 1996 he joined the Institute of Microelectronics, NCSR “Demokritos”, Athens, Greece, as an associate researcher. From 2003 he is with the Department of Electronics Engineering, Piraeus University of Applied Sciences, PUAS (former Technological Educational Institute (TEI) of Piraeus) where now he is a professor and Director of the Electronics and Computer Technologies Laboratory.

 

Dr. Kyriakis-Bitzaros is the author or co-author of two book chapters, and several publications in scientific international journals and conference proceedings. His scientific work has received more than 120 citations from the research community. He has also served as a reviewer in international journals and conferences, such as Optical Engineering, SPIE, ΙΕΕΕ Transactions on Circuits and Systems, Part I., IEE Proceedings Circuits, Devices and Systems, WiSens4Space 2009, International Conference of Space Optics 2006, ICECS 1999.

He is/was scientific coordinator or member of the research team in over 20 research projects funded by the EU, ESA and Greek national authorities such as: “Remote RF powering and Passive Telemetry link for a Wireless Strain Sensor System” (ESA/ESTEC 21339/08/NL/GLC), "Multigigabit Optical Backplane Interconnections" (ESA/ESTEC Contract No: 17884/03/NL/HE), “Photonic Interconnect Layer on CMOS by Wafer-Scale Integration”, PiCMOS (FP6-2002-IST-1-002131),"Wireless access to advanced services implemented on silicon, (MILI-A, 00EPER100), "Bonding Technology for Monolithic Integration of GaAs Optoelectronic Devices on Si Substrates for Chip-to-Chip Optical Interconnections" BONTEC (ESPRIT 28998), "High Performance Electronic System Design Network" ESD-Net (ESPRIT 22509).

His current research interests include the development and implementation of sensor interfaces and systems, reconfigurable digital system design using FPGAs, power harvesting techniques for low-power microcontroller applications, development of circuit models for high-speed light emitting devices for short-range optical interconnects, low-power CMOS VLSI circuit design and real-time DSP algorithms implementation.

 

Publications

Book Chapters

[B3] D. Goustouridis and E.D. Kyriakis-Bitzaros, “Wireless Body Area Networks and Sensors Networking”, in Electronics and Computing in Textiles, S. Vassiliadis (ed), Ch.8, on-line e-book ISBN: 978-87-403-082-0, Bookboon.com, 2013

[B2] E. D. Kyriakis-Bitzaros, and George Halkias, "High-Density Hybrid Integration of III-V Compound Optoelectronics with Silicon Integrated Circuits", in Wafer bonding: Applications and Technology, U. Gösele, and M. Alexe (eds), Ch. 10, pp. 359-376, Springer, 2004.

[B1] D.J. Soudris, E.D. Kyriakis-Bitzaros, V.R. Paliouras, M.K. Birbas, T. Stouraitis, and C.E. Goutis, "On the Design of Two-Level Pipelined Processor Arrays", in Application-Driven Architecture Synthesis, F. Catthoor, L. Svensson (eds), Ch. 5, pp. 95-118, Kluwer Academic Publishers, 1993.

 

Scientific Journals

[J24] K.D. Tsirikolias, E.D. Kyriakis–Bitzaros, “Coordinate Logic Order Statistics filters and FPGA implementation for real-time image processing”, to appear in the Journal of Engineering Science and Technology Review.

[J23] P. Broutas, H. Contopanagos, E. D. Kyriakis-Bitzaros, D. Tsoukalas, S. Chatzandroulis, “A low power RF harvester for a smart passive sensor tag with integrated antenna”, Sensors and Actuators A: Physical, Elsevier Pub., Volume 176, April 2012, Pages 34-45.

[J22] E. D. Kyriakis-Bitzaros, N. A. Stathopoulos, S. Pavlos, D. Goustouridis, and S. Chatzandroulis “A Reconfigurable, Multi-Channel Capacitive Sensor Array Interface” IEEE Transactions on Instrumentation and Measurements, Vol. 60, No 9, Sep. 2011, pp. 3214 – 3221.

[J21] P. Robogiannakis, E.D. Kyriakis-Bitzaros, K. Minoglou, S. Katsafouros, A. Kostopoulos, G. Konstantinidis, G. Halkias, “Metallic bonding methodology for heterogeneous integration of optoelectronic dies to CMOS circuits”, Microelectronic Engineering 85 (2008), 727–732.

[J20] E. Grivas, E.D. Kyriakis-Bitzaros, G. Halkias, S. Katsafouros, G. Morthier, P. Dumon, R. Baets, T. Farell, N. Ryan, I. McKenzie, and E. Armadillo, “Wavelength Division Multiplexing Based Optical Backplane with Arrayed Wavequide Grating Passive Router”, Optical Engineering, SPIE, vol 47(2), Feb. 2008, (# 025401).

[J19] K. Minoglou, G. Halkias, E. D. Kyriakis-Bitzaros, D. Syvridis, “Input and intrinsic device modeling of VCSELs”, Journal Computational Electronics, Sringer Science, Vol. 6, 2007, pp. 309–312.

[J18] K. Minoglou, E. D. Kyriakis-Bitzaros, S.G. Katsafouros, D. Syvridis, G. Halkias, "Driving High Speed VCSELs", Microwave and Optical Technology Letters, Vol. 44, No. 1, Jan. 2005, pp.41-45.

[J17] K. Minoglou, E. D. Kyriakis-Bitzaros, D.Syvridis and G. Halkias, "A compact non-linear equivalent circuit model and parameter extraction method for packaged high-speed VCSELs", IEEE Journal of Lightwave Technology, Vol. 22, No 12, Dec 2004, pp. 2823-2827.

[J16] D. Cengher, Z. Hatzopoulos, S. Gallis, G. Deligeorgis, E. Aperathitis, M. Androulidaki, M. Alexe, V. Dragoi, E. D. Kyriakis-Bitzaros, G. Halkias and A. Georgakilas, “Fabrication of GaAs laser diodes on Si using low-temperature bonding of MBE-grown GaAs wafers with Si wafers,” Journal of Crystal Growth, Vol. 251, 2003, pp.754-759.

[J15] A. Georgakilas, G. Deligeorgis, E. Aperathitis, D. Cengher, Z. Hatzopoulos, M. Alexe, V. Dragoi, U. Gösele, E. D. Kyriakis-Bitzaros, K. Minoglou, and G. Halkias “Wafer-Scale Integration of GaAs Optoelectronic Devices With Standard Si Integrated Circuits Using A Low Temperature Bonding Procedure”, Applied Physics Letters, Vol.81, No27, 30 Dec 2002, pp. 5099-5101.

[J14] E.D. Kyriakis-Bitzaros, and S. Nikolaidis, “Estimation of Bit-Level Transition Activity in Data-Paths Using Word-Level Statistics and Conditional Entropy”, ΙΕΕ Proceedings- Circuits, Devices and Systems, Vol.149, No. 4, Aug. 2002, pp.234-240.

[J13] C. Kapnistis, K. Misiakos, N. Haralabidis, and E.D. Kyriakis-Bitzaros, “An Asynchronous Pixel Architecture for Simultaneous Radiation Imaging and Spectroscopy on a Real Time Basis”, IEEE Transactions on Nuclear Science, Vol. 49, No. 4, Aug. 2002, pp.1802-1807.

[J12] E.D. Kyriakis-Bitzaros, S.G. Katsafouros, and G. Halkias, “Particular Aspects of Drivers for VCSELs Operating at Multi-Gb/s Data Rates”, Journal of Semiconductor Technology and Science, Vol. 2, No. 1, Mar. 2002, pp. 82-86.

[J11] E.D. Kyriakis-Bitzaros, and G. Halkias, “Thermal Resistance Evaluation of High-Speed VCSELs: an Isothermal Optical Transient Technique”, IEEE Photonics Technology Letters, Vol. 14, No. 3, pp. 269-271, Mar. 2002.

[J10] E.D. Kyriakis-Bitzaros, N. Haralabidis, M. Lagadas, A. Georgakilas, Y. Moisiadis, and G. Halkias, “Realistic End-To-End Simulation of the Inter-Chip Optoelectronic Links and Comparison With the Electrical Interconnections for System-on-Chip Applications”, IEEE Journal of Lightwave Technology, Vol. 19, No. 10, pp.1532-1542, Oct 2001.

[J9] E.D. Kyriakis-Bitzaros, N. Haralabidis, Y. Moisiadis, M. Lagadas, A. Georgakilas and G. Halkias, “Comparison of the signal latency in optical and electrical interconnections for inter-chip links”, Optical Engineering, SPIE, Vol. 40, No 1, pp.144-146, Jan. 2001.

[J8] S.Nikolaidis, E.Karaolis, and E.D. Kyriakis-Bitzaros, “Estimation of Signal Transition Activity in FIR Filters Implemented by a MAC Architecture”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No 1, pp. 164-169, Jan. 2000.

[J7] S.S Nikolaidis and E.D. Kyriakis-Bitzaros, “A Charge Recycling Technique for the Design of Low Power CMOS Clock Drivers”, Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, Vol. 9, Nos 3&4, (1999), pp. 169-180.

[J6] E.D. Kyriakis-Bitzaros and C.E. Goutis, "A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays", Journal of VLSI Signal Processing, Κluwer Academic Publishers, Vol. 22, No. 3, Sep. 1999, pp. 151-162.

[J5] D. Soudris, P. Poechmueller, E.D. Kyriakis-Bitzaros, M. Birbas, C. Goutis, and A. Thanailakis, “Design methodology for systematic derivation of fault-tolerant processor array architectures”, International Journal of Electronics, Vol. 84, No.6, 1998, pp. 615-624.

[J4] E.D. Kyriakis-Bitzaros, D.J. Soudris, and C.E. Goutis, "Transformation of Nested Loops into Uniform Recurrences and Their Mapping to Regular Processor Arrays", Journal of Circuits Systems and Computers, World Scientific Publishing Company, Vol. 6 No. 3, (1996), pp. 243-265.

[J3] E.D. Kyriakis-Bitzaros, and C.E. Goutis, "A Systematic Partitioning Method for Designing Fixed-Size Processor Arrays", Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, Vol. 2, No. 1, 1992, pp. 75-80.

[J2] E.D. Kyriakis-Bitzaros and C.E. Goutis, "An Efficient Decomposition Technique for Mapping Nested Loops with Constant Dependencies into Regular Processor Arrays", Journal of Parallel and Distributed Computing, Academic Press, Vol. 16, No. 3, Nov.1992, pp. 258-264.

[J1] J.N. Mourjopoulos, E.D. Kyriakis-Bitzaros, and C.E. Goutis, "Theory and Real-Time Implementation of Time Varying Digital Audio Filters", Journal of AES, Vol 38, No. 718, July-August 1990, pp. 523-536.

 

Conference Proceedings

[C39] S. Vassiliadis, E.D. Kyriakis-Bitzaros, C. Vossou, N. Stathopoulos, S. Chatzandroulis, K. Prekas, A. Marmarali, M. Blagavi. Enhancements Of A Capacitor-Based Measurement Of The Tensile Properties Of Textiles”, International Technical Textiles Congress, 14-16 October 2015, IZMIR, Turkey.

[C38] K. Tsirikolias and E. Kyriakis – Bitzaros, Coordinate Logic Order Statistics filters and FPGA implementation for real-time image processing, PΑCET 2015, Ioannina, Greece. 

[C37] E. Kyriakis-Bitzaros, O.G. Hazapi, “An Intelligent Microprocessing System”, Student EUREKA 2009, Corfu, Greece, pp. 175 – 184 

[C36] Panagiotis Broutas, Stathis Kyriakis Bitzaros, Dimitrios Goustouridis, Stavros Katsafouros, Dimitrios Tsoukalas, and Stavros Chatzandroulis, “Conceptual Design of a Wireless Strain Monitoring System for Space Applications”, F. Granelli et al. (Eds.): MOBILIGHT 2009, LNICST 13, pp. 405–410, 2009.

[C35] P. Broutas, S. Kyriakis Bitzaros, D. Goustouridis, S. Katsafouros, D. Tsoukalas,  S. Chatzandroulis, “Conceptual Design of a Wireless Strain Monitoring System for Space Applications”, WiSens4Space 2009, Santorini, Greece.

[C34] Panagiotis Broutas, Stathis Kyriakis Bitzaros, Ioannis Mourtsiadis, Dimitrios Goustouridis, Stavros Katsafouros, Dimitrios Tsoukalas, Stavros Chatzandroulis, “Power Harvesting Scheme for Remotely Powered Sensor Tags”, ESSDERC 2009, Athens, Greece. 

[C33] S.Pavlos, E. D. Kyriakis-Bitzaros, S.Chatzandroulis, “An Embedded Readout System for Capacitive Sensor Arrays”, 16th IFIP/ IEEE International Conference on VLSI-SoC 2008, Rhodes, Greece.

[C34] P. Broutas, S. Kyriakis Bitzaros, D. Goustouridis, S. Katsafouros, D. Tsoukalas, S. Chatzandroulis, “Conceptual Design of a Wireless Strain Monitoring System for Space Applications”, SWiSens4Space 2009, Santorini, Greece.

[C33] P. Broutas, S. Kyriakis Bitzaros, I. Mourtsiadis, D. Goustouridis, S. Katsafouros, D. Tsoukalas, S. Chatzandroulis, “Power Harvesting Scheme for Remotely Powered Sensor Tags”, ESSDERC 2009, Athens, Greece.

[C32] K.Minoglou, G.Halkias, E.D.Kyriakis-Bitzaros, D.Syvridis, A.Arapogianni, “VCSEL Device Modeling and Parameter Extraction Technique”, IEEE 14th ICECS 2007, Marrakesh, Morocco, 11-14 Dec. 2007.

[C31] K.Minoglou, E.D.Kyriakis-Bitzaros, S.G. Katsafouros, G.Halkias, A.Arapogianni, and D.Syvridis, “High Density Integrated Optoelectronic Circuits for High-Speed Photonic Microsystems”, PRIME 2007, Bordeaux, France, pp 57-60.

[C30] E.D. Kyriakis-Bitzaros, E. Grivas, G. Halkias, S. Katsafouros, P. Dumon, G. Morthier, R. Baets, T. Farell, N. Ryan, I. McKenzie, and E. Armadillo, “A WDM Optical Backplane with AWG Based Passive Routing”, IEEE Photonics in Switching Conference 2006 (PS2006), Heraklion, Crete, Greece, (Paper # P10).

[C29] P.Robogiannakis, E.D.Kyriakis-Bitzaros, K.Minoglou, S.Katsafouros, A.Kostopoulos, G.Konstadinidis and G.Halkias, “Heterogeneous Integration Technique of Optoelectronic dies to CMOS Circuits Via Metallic Bonding”, ESTC 2006, Sept. 5-7, Dresden, Germany.

[C28] E. Grivas, E.D. Kyriakis-Bitzaros, G. Halkias, S. Katsafouros, G. Morthier, P. Dumon, R. Baets, T. Farrell, N. Ryan, I. McKenzie, and E. Armadillo, “WDM Based Multigigabit Optical Backplane for On-Board Applications”, Int. Conference on Space Optics, 27-30 June 2006, ESA/ESTEC, Nordwijk, The Netherlands.

[C27] K.Minoglou, E.D. Kyriakis-Bitzaros, D. Syvridis, A. Arapoyanni, G. Halkias, “VCSELs Modeling and Simulation”, PRIME 2006, June 12-15, Otranto, Italy.

[C26] K.Minoglou, E.D. Kyriakis-Bitzaros, D. Syvridis, G. Halkias, “Input and Intrinsic Device Modeling of VCSELs”, International Workshop on Computational Electronics (IWCE) 2006, May 25-27, Vienna, Austria, pp. 327-328.

[C25] P. Dumon, W. Bogaerts, D. Van Thourhout, G. Morthier, R. Baets, P. Jaenen, S. Beckx, J. Wouters, T. Farrell, N. Ryan, E. Grivas, E.D. Kyriakis-Bitzaros, G. Halkias , and I. McKenzie, “A Nanophotonic 4x4 Wavelength Router in Silicon-on Insulator”, Optical Fiber Conference (OFC) 2005, Paper No. Oth05.

[C24] E.D. Kyriakis-Bitzaros, K. Minoglou, and G. Halkias, “System Level Modeling and Simulation of Optical Interconnects”, Invited Talk, 12th European Conference on Integrated Optics, April 2005, Grenoble, France, pp. 335-344.

[C23] K. Minoglou, E. D. Kyriakis-Bitzaros, E. Grivas, S. Katsafouros, A. Kostopoulos, G. Konstadinidis and G. Halkias, “Metallic Bonding of Optoelectronic Dies to Silicon Wafers”, 2nd International Conference on Microelectronics, Microsystems and Nanotechnology (MMN 2004), Athens, Greece, J. of Physics, Conf. Series 10, pp. 393-396, 2005.

[C22] K.Minoglou, E. D. Kyriakis-Bitzaros, D. Syvridis, G. Halkias, “Development of a New Parameter Extraction Methodology for the Modeling of the Input of the VCSELs”, HETECH 2004, 13th European Workshop on Heterostructure Technology, October 2004, Heraklion, Crete, Greece.

[C21] K. Minoglou, E. D. Kyriakis-Bitzaros, A. Arapoyianni, G. Halkias, “Effects of Packaging Parasitics on High Speed Operation of VCSELs”, Proceedings of IEEE NEWCAS 2004, Montreal, Canada, pp. 53-56.

[C20] D. Cengher, Z. Hatzopoulos, S. Gallis, G. Deligeorgis, E. Aperathitis, M. Alexe, V. Dragoi, E. D. Kyriakis-Bitzaros, G. Halkias, and A. Georgakilas, "Fabrication of GaAs laser diodes on Si using low temperature bonding of MBE grown GaAs wafers with Si wafers", Proceedings of the IEEE XIIth International Conference on Molecular Beam Epitaxy (MBE), San Fransisco, CA, USA, Sep. 2002, pp. 81-82.

[C19] G. Deligeorgis, S. Gallis, M. Androulidaki, D. Cengher, Z. Hatzopoulos, M. Alexe, V. Dragoi, E. D. Kyriakis-Bitzaros, G. Halkias, F. Peiro and A. Georgakilas, "Properties of GaAs/Si heterostructure material fabricated by low temperature wafer bonding using a spin-on-glass intermediate layer", Proceedings of the IEEE XIIth International Conference on Semiconducting and Insulating Materials (SIMC), Smolenice, Slovakia, July 2002, pp.125-128.

[C18] C. Kapnistis, K.Misiakos, N. Haralabidis, and E. Kyriakis-Bitzaros, “A Monolithic CMOS MIP Energy Dispersive Mixed-Signal Radiation Detector”, Proceedings of IEEE Nuclear Science Symposium (NSS) 2001, Conference Record #1362.

[C17] P. Robogiannakis, S. G. Katsafouros, E. D. Kyriakis-Bitzaros, N. Haralabidis, and G. Halkias, “An HBT-BICMOS Laser Driver With Independently Adjustable DC and Modulation Currents For High Speed Optical Interconnections,” Proceedings of MMN 2000, Athens, Greece, Nov. 2000, World Scientific Publishing Co., pp. 305-308.

[C16] G. Halkias, N. Haralabidis, E.D. Kyriakis-Bitzaros, and S. Katsafouros, “1.7 GHz Bipolar Optoelectronic Receiver Using Conventional 0.8um BiCMOS Process”, Proceedings of IEEE Int. Symposium on Circuits and Systems (ISCAS) 2000, Geneva, Vol. V, pp. 417-420.

[C15] S. Nikolaidis, E. Karaolis and E.D. Kyriakis-Bitzaros, “Estimation of the Transition Activity in MAC Architectures Implementing FIR Filters”, Proceedings of IEEE ICECS 1999, Pafos, Cyprus, pp. 919-923.

[C14] E.D. Kyriakis-Bitzaros, S. Nikolaidis and A. Tatsaki, “Accurate Calculation of Bit-Level Transition Activity Using Word-Level Statistics and Entropy Function”, Proceedings of the IEEE/ACM Int. Conference on Computer Aided Design, pp. 607-610, Nov. 1998.

[C13] S. Nikolaidis, A. Chatzigeorgiou, and E.D. Kyriakis-Bitzaros, “Delay and Power Estimation of a CMOS Inverter Driving RC Interconnect Loads”, Proceedings of the IEEE Int. Symposium on Circuits and Systems (ISCAS) 1998, Vol. VI, pp 368-371.

[C12] E.D. Kyriakis-Bitzaros and S.S Nikolaidis, “Design of Low Power CMOS Drivers Based on Charge Recycling”, Proceedings of the IEEE Int. Symposium on Circuits and Systems 1997, pp.1924-1927.

[C11] K.E. Karagianni, E.D. Kyriakis-Bitzaros, and T. Stouraitis, "Mapping Iterative Algorithms onto Processor Arrays by the Use of Petri Net Models", Int. Conference on Massively Parallel Computing Systems, (MPCS '94), pp. 140-151, May 1994, Italy.

[C10] V. Paliouras, E.D. Kyriakis-Bitzaros, T. Stouraitis, and C.E. Goutis, "Modelling of Algorithms and Processor Arrays Based on Cellular Automata", Modelling Techniques and Tools for Computer Performance Evaluation 1994, pp. 63-66, May 1994, Vienna.

[C9] E.D. Kyriakis-Bitzaros, O.G. Koufopavlou, and C.E. Goutis, "Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays", Proc. of the International Conference on Parallel Processing 1993, Aug. 1993, Vol III, pp. 2-9.

[C8] D.J. Soudris, P. Poechmueller, E.D. Kyriakis-Bitzaros, M.K. Birbas, C.E. Goutis, and M. Glesner, "Design Methodology for Systematic Derivation of Fault-Tolerant Array Processors", CompEuro 1992, pp. 562-567.

[C7] M.K. Birbas, E.D. Kyriakis-Bitzaros, D.J. Soudris, and C.E. Goutis, " Direct Mapping of Nested Loops and Efficient Decomposition of Uniform Recurrences for Implementation on Array Architectures" in "Algorithms and Parallel VLSI Architectures", E.F. Deprettere, A.J. van der Veen (eds), Elsevier Science Publishers, Vol B, pp. 343-352, 1991.

[C6] E.D. Kyriakis-Bitzaros and C.E. Goutis, "A New Partitioning Method for Mapping Uniform Recurrences into Fixed Size Processor Arrays", Fourth ISMM/IASTED Inter. Conference on Parallel and Distributed Computing and Systems, 1991, U.S.A., pp. 39‑40

[C5] A. Tsopanoglou, E.D. Kyriakis-Bitzaros, J. Mourjopoulos and G. Kokkinakis, "A Real-Time Speech Decoder Using Instantaneous Frequency and Energy", Eurospeech 1991, Italy, pp. 1349-1352.

[C4] E.D. Kyriakis-Bitzaros and C.E. Goutis, " An Efficient Decomposition Technique for Mapping Uniform Recurrences onto Regular Array Processors", Int. Workshop on Algorithms and Parallel VLSI Architectures, June 1990, Part B, pp. 94-100, France.

[C3] J.N. Mourjopoulos, E.D. Kyriakis-Bitzaros, and C.E. Goutis, " Theory and Real-Time Implementation of time Varying Digital Audio Filters", 86th AES Convention, preprint 2773 (R-S), March 1989, Hamburg.

[C2] C.E. Goutis, M.K. Birbas, E. Kyriakis-Bitzaros, and D. Soudris, " Rule Based Mapping of Iterative Primitives on their Architectures", CAVE Workshop, December 1988, Italy.

[C1] E. Kyriakis-Bitzaros, A.N. Skodras, E. Zigouris, "Implementation of FIR and IIR Digital Filters using 16-bits mPs and DSPs. A Comparative Study", Panhellinic conference on Applications of Microcomputer Systems, Research-Education-Industry, Oct. 1988, pp. 609-616.